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MIC59P60
Micrel
MIC59P60
8-Bit Serial-Input Protected Latched Driver
General Description
The MIC59P60 serial-input latched driver is a high-voltage (80V), high-current (500mA) integrated circuit comprised of eight CMOS data latches, a bipolar Darlington transistor driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, CLOCK, SERIAL DATA INPUT, and OUTPUT ENABLE functions. Similar to the MIC5842, additional protection circuitry supplied on this device includes thermal shutdown, under voltage lockout (UVLO), and overcurrent shutdown. The bipolar/CMOS combination provides an extremely lowpower latch with maximum interface flexibility. The MIC59P60 has open-collector outputs capable of sinking 500mA and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80V (50V sustaining). The drivers can be operated with a split supply, where the negative supply is down to -20V and may be paralleled for higher load current capability. Using a 5V logic supply, the MIC59P60 will typically operate at better than 5MHz. With a 12V logic supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS circuits. TTL circuits may require pull-up resistors. By using the serial data output, drivers may be cascaded for interface applications requiring additional drive lines. Each of these eight outputs has an independent over current shutdown of 500 mA. Upon over-current shutdown, the affected channel will turn OFF and the flag will go low until VDD is cycled or the ENABLE/RESET pin is pulsed high. Current pulses less than 2s will not activate current shutdown. Temperatures above 165C will shut down the device and activate the error flag. The UVLO circuit prevents operation at low VDD; hysteresis of 0.5V is provided.
Features
* * * * * * * * * * * 3.3 MHz Minimum Data-Input Rate Output Current Shutdown (500mA Typical) Under Voltage Lockout Thermal Shutdown Output Fault Flag CMOS, PMOS, NMOS, and TTL Compatible Internal Pull-Up/Pull-Down Resistors Low Power CMOS Logic and Latches High Voltage Current Sink Outputs Output Transient-Protection Diodes Single or Split Supply Operation
Ordering Information
Part Number MIC59P60BN MIC59P60BV MIC59P60BWM Temperature Range -40C to +85C -40C to +85C -40C to +85C Package 20-Pin Plastic DIP 20-Pin PLCC 20-Pin Wide SOIC
Functional Diagram
Pin Configuration
(DIP and SOIC)
CLEAR 1 2
SUB
THERMAL SHUTDOWN
I LIMIT
20 FLAG 19 OUTPUT 1 18 OUTPUT 2
CLOCK SERIAL DATA IN
3 8-BIT SERIAL-PARALLEL SHIFT REGISTER
20 FLAG 7 SERIAL DATA OUT VDD
VEE CLOCK SERIAL DATA IN VSS VDD
4
6
3
SHIFT REGISTER
VSS
5
LATCHES
8 9 MOS BIPOLAR
STROBE OUTPUT ENABLE/RESET
4 5 6 7 8 9
17 OUTPUT 3
LATCHES
CLEAR
1
16 OUTPUT 4 15 OUTPUT 5 14 OUTPUT 6 13 OUTPUT 7 12 OUTPUT 8 11 K
UVLO
SERIAL DATA OUT STROBE
THERMAL SHUTDOWN
ILIMIT
11 K
19
18
17
16
15
14
13
12
SUB
2 VEE
10
OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 OUT 8
OUTPUT ENABLE/RESET
VEE 10
SUB
UVLO
Micrel, Inc. * 1849 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 944-0970 * http://www.micrel.com
January 2000
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MIC59P60
MIC59P60
CLOCK CLEAR OUT 1 FLAG VEE
Micrel
PLCC Pin Configuration
Absolute Maximum Ratings VSS = 0; TA = 25C
Output Voltage (VCE) .................................................... 80V Output Voltage (VCE(SUS)) ............................... 50V, Note 1 VDD with Reference to VSS ........................................... 15V VDD with Reference to VEE ........................................... 25V Emitter Supply Voltage (VEE) ...................................... -20V Input Voltage (VIN) ............................... -0.3V to VDD+0.3V Protected Current ............................................ 1.5A, Note 2 Power Dissipation (PD) Plastic DIP (N) ......................................................... 2.0W Derate above TA = +25C ............................ 20mW/C PLCC (V) .................................................................1.4W Derate above TA = +25C ............................ 14mW/C Wide SOIC (WM) .................................................... 1.2W Derate above TA = +25C ............................ 12mW/C Operating Temperature (TA) Plastic DIP (N), PLCC (V), SOIC (WM) .. -40C to +85C Storage Temperature (TS) ....................... -65C to +150C Junction Temperature (TJ) ...................................... +150C ESD ......................................................................... Note 3
Note 1: Note 2: Note 3:
V SS
3
2
1
20
19 18 17
SERIAL DATA IN VSS VDD SERIAL DATA OUT STROBE
4 5 6 7 8 9 10 11 12 13
OUT 2 OUT 3 OUT 4 OUT 5 OUT 6
MIC59P60BV
16 15 14
OE/RESET
K
OUT 8
Typical Inputs
CLOCK SERIAL DATA IN
V DD
OUT 7
VEE
V DD
STROBE OUTPUT ENABLE
For inductive load applications. Each channel. VEE connection must be designed to minimize inductance and resistance. Devices are input-static protected but can be damaged by extremetly high static charges.
V SS
Typical Output Driver
K
OUT N
3K
V EE
Pin Description
Pin 1 2,10 3 4 5 6 7 8 9 Name CLEAR VEE CLOCK
SUB
Description Sets All Latches OFF (open). Output Ground (Substrate). Most negative voltage in the system connects here. Serial Data Clock. A CLEAR must also be clocked into the latches. Serial Data Input pin. Logic reference (Ground) pin. Logic Positive Supply voltage. Serial Data Output pin. (Flow through). Output Strobe pin. Loads output latches when High. A STROBE is needed to CLEAR latches. When Low, Outputs are active. When High, device is inactive and reset from a fault condition. An under voltage condition emulates a high OE/ RESET input. Transient suppression diode's cathode common pin. Open Collector outputs 8 through 1. Error Flag. Flag is Low upon Overcurrent Fault or Overtemperature fault. OUTPUT ENABLE/RESET must be pulled high to reset the flag and fault condition.
SERIAL DATA IN VSS VDD SERIAL DATA OUT STROBE OUTPUT ENABLE/RESET
11 12--19 20
K OUTPUT N FLAG
MIC59P60
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MIC59P60
Micrel
Electrical Characteristics
VDD = 5V, VSS = VEE = 0V; TA = +25C; unless noted. Limits Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Collector-Emitter Sustaining Voltage Input Voltage Symbol ICEX VCE(SAT) Test Conditions VOUT = 80V VOUT = 80V, TA = +70C IOUT = 100mA IOUT = 200mA IOUT = 350mA IOUT = 350mA, L = 2mH 50 1.0 VDD = 12V VDD = 10V VDD = 5.0V, Note 4 VDD = 12V VDD = 10V VDD = 5.0V VOL = 0.4V VOH = 12.0V All Drivers ON, VDD = 12V All Drivers ON, VDD = 10V All Drivers ON, VDD = 5.0V 10.5 8.5 3.5 50 50 50 200 300 600 15 50 6.4 6.0 4.6 3.1 2.9 2.3 2.6 2.4 1.9 10.0 9.0 7.5 4.5 4.5 3.6 4.2 3.6 3.0 50 1.7 500 Note 5 3.5 3.0 4.0 3.5 165 10 4.5 4.0 2.0 Min. Typ. 100 0.9 1.1 1.3 1.1 1.3 1.6 V Max. 50 Unit A
VCE(SUS) VIN(0) VIN(1)
V V V
Input Resistance
RIN
k
Flag Output Current Flag Output Leakage Supply Current
IOL IOH IDD(ON)
mA nA mA
IDD (1 OUTPUT) One Driver ON, All others OFF, VDD = 12V One Driver ON, All others OFF, VDD = 10V One Driver ON, All others OFF, VDD = 5V IDD(OFF) All Drivers OFF, VDD = 12V All Drivers OFF, VDD = 10V All Drivers OFF, VDD = 5.0V VR = 80V IF = 350mA
mA
mA
Clamp Diode Leakage Current Clamp Diode Forward Voltage Over Current Shutdown Threshold Start Up Voltage Minimum Supply (VDD) Thermal Shutdown Thermal Shutdown Hysteresis
IR VF ILIM VSU VDD MIN
A V mA V V C C
Note 4: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic "1". Note 5: Undervoltage lockout is guaranteed to release device at no more than 4.5V, and disable the device at no less than 3.0V
January 2000
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MIC59P60
MIC59P60
CLOCK A B DATA IN E STROBE C F D
Micrel
OUTPUT ENABLE G OUT N
Timing Conditions
(TA = +25C, Logic Levels are VDD and VSS, VDD = 5V) A. B. C. D. E. F. G. Typical Data Active Time Before Clock Pulse (Data Set-Up Time) ........................................................................... 75 ns Minimum Data Active Time After Clock Pulse (Data Hold Time) .............................................................................. 75 ns Minimum Data Pulse Width ..................................................................................................................................... 150 ns Minimum Clock Pulse Width .................................................................................................................................... 150 ns Minimum Time Between Clock Activation and Strobe ............................................................................................. 300 ns Minimum Strobe Pulse Width ................................................................................................................................... 100 ns Typical Time Between Strobe Activation and Output Transition ............................................................................. 500 ns
SERIAL DATA present at the input is transferred to the shift register on the logic "0" to logic "1" transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the rising edge of the CLOCK input waveform. Holding CLEAR high results in a data logic "0" being clocked into the shift register, turning off respective channels. Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the ENABLE input be high to prevent invalid output states. When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting information stored in the latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches. A positive OE/RESET pulse resets the FLAG and the output after a current shutdown fault. Over-temperature faults are not latched and require no reset pulse.
MIC59P60 Truth Table
Serial Data Input H L X H Shift Register Contents Clear Clock Input Input I1 H L R1 O X P1
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State O = Output OFF
I2 R1 R1 R2 O X P2
I3 ...... R2 ...... R2 ...... R3 ...... O ...... X ...... P3 ......
I8 R7 R7 R8 O X P8
Serial Data Output R7 R7 R8 L X P8
Latch Contents Strobe Input I1 I2 I3 ......
Output Contents Output I8 Enable I1 I2 I3 ...... I8
L H
R1 R2 P1 P2 X X
R3 P3 X
...... ...... ......
R8 P8 X L H P1 H P2 H P3 ......P8 H ...... H
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January 2000
MIC59P60
Micrel
Typical Characteristic Curves
Output Saturation Voltage vs. Temperature
SUPPLY CURRENT (mA)
SATURATION VOLTAGE (V)
IL = 350mA
4 3 2 1 0 -50
ALL OUTPUTS ON VDD = 5V
SHUTDOWN THRESHOLD (A)
1.5 1.4 1.3 1.2 1.1 1 0.9 0.8
5
Supply Current vs. Temperature
Current Shutdown Threshold vs. Temperature
0.60 0.55 VDD = 5V 0.50 0.45 0.40 0.35 -50 VDD = 12V
VDD = 5V to 12V IL = 100mA
0.7 0.6 0.5 -50
ALL OUTPUTS OFF
0 50 100 TEMPERATURE (C)
150
0 50 100 TEMPERATURE (C)
150
0 50 100 TEMPERATURE (C)
150
CURRENT LIMIT DELAY (S)
SATURATION VOLTAGE (V)
SUPPLY CURRENT (mA)
1.5 1.4 1.3 1.2 1.1 1 0.9 0.8
Output Saturation Voltage vs. Temperature
7 6 5 4 3 2 1 0 -50
Supply Current vs. Temperature
ALL OUTPUTS ON VDD = 12V
20 18 16 14 12 10 8 6 4
Current Shutdown Delay vs. Output Current
IL = 350mA VDD = 12V IL = 100mA
ALL OUTPUTS OFF
VDD = 12V
0.7 0.6 0.5 -50
0 50 100 TEMPERATURE (C)
150
0 50 100 TEMPERATURE (C)
150
2 VDD = 5V 0 0.3 0.4 0.5 0.6 0.7 0.8 OUTPUT CURRENT (A)
0.9
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MIC59P60
MIC59P60
Micrel
Maximum Allowable Duty Cycle (Plastic DIP)
VDD = 5.0V
Number of Outputs ON (IOUT = 200mA VDD = 5.0V) 8 7 6 5 4 3 2 1
Max. Allowable Duty Cycle at Ambient Temperature of 25C 85% 97% 100% 100% 100% 100% 100% 100% 40C 72% 82% 96% 100% 100% 100% 100% 100% 50C 64% 73% 85% 100% 100% 100% 100% 100% 60C 55% 63% 73% 88% 100% 100% 100% 100% 70C 46% 53% 62% 75% 93% 100% 100% 100%
VDD = 12V
Number of Outputs ON (IOUT = 200mA VDD = 12V) 8 7 6 5 4 3 2 1
Max. Allowable Duty Cycle at Ambient Temperature of 25C 80% 91% 100% 100% 100% 100% 100% 100% 40C 68% 77% 90% 100% 100% 100% 100% 100% 50C 60% 68% 79% 95% 100% 100% 100% 100% 60C 52% 59% 69% 82% 100% 100% 100% 100% 70C 44% 50% 58% 69% 86% 100% 100% 100%
Typical Applications
Protected Solenoid Driver with Output Enable
+5V 10k FLAG
THERMAL SHUTDOWN
I LIMIT
+48V
22 20 19
+
CLEAR
1 2
SUB
CLOCK SERIAL DATA IN ENABLE
3 4 5 0.1 6 7 8 9 10
SUB
UVLO
18
SHIFT REGISTER
17
LATCHES
16 15 14 13 12 11
MIC59P60
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January 2000
MIC59P60
Micrel
Hammer Driver
+5V FLAG +28V
10k 1 2
SUB
THERMAL SHUTDOWN
I LIMIT
22 20 19 18
+
CLEAR
CLOCK SERIAL DATA IN
3 4 5 6 7 8 0.1 9 10
SUB
UVLO
SHIFT REGISTER
17
LATCHES
16 28V 15 14 13 12 11
Protected Negative/Positive PIN Diode Driver Transmit/Receive Switch
FLAG CLOCK +5V DATA IN STROBE 1 2
SUB
THERMAL SHUTDOWN
I LIMIT
10k +75V 20 15 19 1000p 18
SHIFT REGISTER
10k Transmitter RFC D1 Antenna
3 4 5 +5V 0.1 6 7 8 9 100 10 + 0.01
SUB
UVLO
17
LATCHES
+75V
16 25 15 1000p 14 13 25 12 1000p 11 +75V 0.01
10k D2 RFC RFC +75V 10k Receiver RFC D3
-5V
D1 (Latch 1) Receive OFF Transmit ACTIVE
Diode D2 (Latch 5) ACTIVE OFF
D3 (Latch 8) OFF ACTIVE
PIN Diodes: UM9651
January 2000
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MIC59P60
MIC59P60
Micrel
Package Information
1.070 MAX (27.178) PIN 1 0.030-0.110 RAD (0.762-2.794)
.2500.005 (6.3500.127)
0.0600.005 (1.5240.127) 0.1300.005 (3.3020.127) 0.040 TYP (1.016)
0.020 (0.508)
0.290-0.320 (7.336-8.128)
0-10 0.020 MIN (0.508) 0.125 MIN (3.175) +0.025 -0.015 +0.635 8.255 -0.381 0.325
0.0180.003 (0.4570.076)
0.1000.010 (2.5400.254)
(
)
20-Pin Plastic DIP (N)
PIN 1
0.301 (7.645) 0.297 (7.544)
DIMENSIONS: INCHES (MM)
0.027 (0.686) 0.031 (0.787)
0.050 (1.270) TYP
0.016 (0.046) TYP
0.094 (2.388) 0.090 (2.286)
0.509 (12.929) 0.505 (12.827)
7 TYP 0.015 R (0.381) 0.015 (0.381) SEATING MIN PLANE
0.103 (2.616) 0.099 (2.515)
0.297 (7.544) 0.293 (7.442)
0.022 (0.559) 0.018 (0.457) 5 TYP 10 TYP
0.330 (8.382) 0.326 (8.280) 0.032 (0.813) TYP 0.408 (10.363) 0.404 (10.262)
20-Pin Wide SOP (WM)
MIC59P60
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January 2000
MIC59P60
Micrel
TOP VIEW 0.045 0.045 DETAIL A 0.050 0.110 0.080 0.027 0.030 DIA x 0.015 R DEPTH 0.018
0.351 0.003 0.390 0.020 SIDE VIEW BOTTOM VIEW
0.300
0.045 0.045
0.035 R 0.015
DETAIL A 0.170 0.110
20-Pin PLCC (V)
January 2000
9
0.310 .015
MIC59P60
MIC59P60
Micrel
MIC59P60
10
January 2000
MIC59P60
Micrel
January 2000
11
MIC59P60
MIC59P60
Micrel
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800
FAX
+ 1 (408) 944-0970
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated
MIC59P60
12
January 2000

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